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GOEPEL electronic automates Validation and Test of High-Speed I/O by FPGA Embedded Instruments

At the 2013 International Test Conference, GOEPEL electronic introduced an Automatic Application Program Generators (AAPG) for design validation and test of FPGA integrated high-speed I/O (HSIO) based on the ChipVORX® technology for FPGA Embedded Instruments. Users can now evaluate transmission channel quality by utilizing Bit Error Rate Tests (BERT). This provides a graphical evaluation per dynamic eye diagram to support design validation.

“The development towards FPGA based board designs is also accompanied by more and more high-speed I/O, difficult to test by traditional metrology due to continuously decreasing physical access. Our new solution addresses this very problem”, says Heiko Ehrenberg, Technology Officer for Embedded System Access for GOEPEL electronics in the USA. “Because of high automation level, the high-speed I/O’s FPGA parameters can be interactively defined, and become immediately effective without design synthesis, i.e. users can directly validate the influence on transfer quality. Furthermore, signals received in the silicon are recorded and visualized, which enables unaltered measurement results.”

About the Automatic Application Program Generator:
The new generator is another option in the integrated JTAG/Boundary Scan software platform SYSTEM CASCON™, enabling automatic generation of complete application scripts for FPGA embedded HSIO test instruments. These are chip-dependent instrument selections, establishment within an FPGA, addressing, configuration, procedural control, qualification of generated data and graphical eye visualization.
The AAPG connects ChipVORX model integrated instrument information with the intrasystem data base for structural and functional UUT (unit under test) description and protocol-specific user guidelines for configuration of the target FPGA’s high-speed I/O channels. The fully automatically generated script is based on the SYSTEM CADCON™ integrated standard language CASLAN (CAScon LANguage) and can be executed on each run-time station without additional options. Gang applications are also supported.

About Bit Error Rate Test (BERT):
So called Bit Error Rates (BER) are measured to evaluate the channel quality in digital transmission systems. BER is the relation between faulty transported bits and the total number of transported bits in a certain time interval. The equipment consists basically of the pattern generator, a transceiver with error detector and a clock generator, synchronising both. The bit patterns, created by the pattern generator, are in particular important for the quality of the Bit Error Rate Test, as they have critical influence on the fault stimulation during the transmission (stress pattern).

About Chip Embedded Instruments:
Chip embedded Instruments are permanently integrated or temporarily implemented test and measurement functions (T&M) in an integrated circuit. Virtually, they are the counterpart to external T&M instruments as they don’t require invasive contacting by means of probes or nails. Hence, the problem of signal distortion in high-speed designs by parasitic contacting effects is omitted. Chip embedded Instruments are part of the so called Embedded System Access (ESA) technologies that are currently the most modern strategy for validation, test and debug as well as programming of complex boards and systems. They can be utilised throughout the entire product life cycle, enabling improved test coverage at reduced costs.

About ChipVORX®:
ChipVORX is an IP-based technology for implementation, access and control of Chip embedded Instruments via IEEE Std. 1149.x/JTAG. It also supports FPGA embedded instruments in the form of softcores. The ChipVORX library currently contains more than 300 different test and measurement instruments for all leading FPGA platforms. Some of these instruments are frequency meters and high-speed Flash programmers as well as IP for at-speed access test of dynamic RAM devices.

About the development, funding and availability:
The BERT instruments development as prototypes and their integration into respective system software is the result of a strategic cooperation between GOEPEL electronic and Testonica Lab. The ChipVORX® IP models for BERT will be supported in SYSTEM CASCON™ starting from version 4.6.3 , and are activated per license manager just like the system software. SYSTEM CASCON™ is GOEPEL electronic’s professional JTAG/Boundary Scan development environment with currently more than 45 fully integrated ISP, test and debug tools. In terms of hardware, ChipVORX is completely supported in the platform SCANFLEX®.

The project upon which this publication is based was funded by the Federal Minister of Education and Research within the frame of the Eurostars funding programme (E! 5568 COMBOARD).

GOEPEL electronic and iSYSTEM develop integrated Platform for Software and Hardware Validation and Test

At the 2013 International Test Conference, GOEPEL electronic, world-class Boundary Scan vendor and iSYSTEM, innovative tool provider for embedded software design announce the market introduction of another new development within the framework of a long-term strategic cooperation for Embedded System Access (ESA) technologies.
The innovation named iTIC seamlessly integrates a complete on-chip debugger in the form of a TAP Interface Card (TIC) into the ESA hardware platform SCANFLEX® for the first time. On this basis, it brings together technologies for non-intrusive software and hardware validation and test with unprecedented compatibility.
The iTIC, controlled via the TAP Interface Cards’ internal standard interface, supports all procedures for software debugging as well as any technologies for Embedded System Access, such as Boundary Scan, Processor Emulation Test, FPGA Assisted Test and in-system programming of Flash and PLD.

“The new iTIC is a highly important milestone for the holistic implementation of our Embedded System Access philosophy. The successful cooperation with our long-term, partner iSYSTEM enables us to support a considerably higher number of microprocessors and, furthermore, exploit synergies between different applications to an even greater degree”, says Thomas Wenzel, Managing Director of GOEPEL electronic’s JTAG/Boundary Scan Division. “The opportunity to execute all procedures on one platform brings users added efficiency in design validation and flexibility in test throughout the entire product life cycle.”

“In recent years, we systematically extended our tools‘ connectivity for embedded software development and test and associated partnerships with vendors of complementary products to create significant added values in operational efficiency and performance for our customers“, explains Erol Simsek, CEO with iSYSTEM AG. “Based on the intensive cooperation with GOEPEL electronic as market leader for Embedded System Access technologies, we will continue this course, and, additionally, extend our activities as OEM vendor.”


About the iTIC module:
The iTIC is already the seventh member in the TAP Interface Card (TIC) family, controlled via a differential interface. That means, all existing installations can be simply upgraded.
The differential coupling enables trouble-free data transfer up to 80 MHz over distances of up to four meters. There will be no performance loss because runtime delays of cables and units under test (UUT) can be individually compensated per TAP by means of the ADYCS™ technology. As a result, the iTIC can be integrated into application critical environments such as In-Circuit test fixtures.
Designed as an active test head, the iTIC supports a multitude of different operations and process architectures. These include standards such as IEEE1149.1, IEEE1149.6, IEEE1149.7, IEEE1532 and IEEE-ISTO 5001, and numerous non-JTAG interfaces like BDM (Background Debug Mode), SBW (Spy-Bi-Wire), SWD (Serial Wire Debug) and many more. The target interface can be completely galvanically isolated via relays.

The iTIC is supported in the leading JTAG/Boundary Scan software SYSTEM CASCON™ and automatically detected by the AutoDetect feature. Through OEM cooperation with all leading vendors of In-Circuit testers (ICT), Manufacturing Defect Analysers (MDA), Flying Probers (FPT) and Functional Test systems (FCT), the new solution is available immediately for production test applications.

About Embedded System Access (ESA):
ESA technologies enable the electrical access to embedded systems without utilizing mechanical nails or probe contacts (non-invasive methods). They apply design-integrated test and debug interfaces such as JTAG. In addition to Boundary Scan, ESA technologies include procedures like Chip Embedded Instruments, Processor Emulation Test, In-system Programming or Core Assisted Programming. ESA technologies are currently the most modern strategies for validation, test and debug as well as programming complex chips, boards, and complete units. They can be utilized throughout the entire product life cycle, enabling increased test coverage at reduced costs.

About GOEPEL electronic:
GOEPEL electronic is a worldwide leading vendor of innovative electronic and optical test and inspection systems, being the market leader for professional JTAG/Boundary Scan solutions for Embedded System Access (ESA). A network of branch offices, distributors and service partners ensures the global availability of the products as well as the support of the more than 8,000 system installations. Founded in 1991 and headquartered in Jena/Germany, GOEPEL electronic employs currently more than 200 employees and generated a revenue of 27 Million Euro in 2012 (ca. $36 Mio). GOEPEL electronic has continuously been ISO9001 certified since 1996 and has been honoured with TOP-JOB and TOP-100 awards for being one of the best medium-sized companies in Germany. GOEPEL electronic’s products won several awards in recent years and are used by the leading companies in telecommunication, automotive, space and avionics, industrial controls, medical technology, and other industries. Further information about the company and its products can be found on the internet at

About iSYSTEM:
iSYSTEM is a privately held company headquartered in Germany, close to Munich. Since its foundation in 1986, iSYSTEM is an independent manufacturer and provider of embedded software debugging and test tools. Beside standard products iSYSTEM offers development and production services for custom designs, projects and OEM products.

iSYSTEM’s Blue Box Technology stands for fast and easy microcontroller access via any kind of microcontroller debug interface. No matter whether one is developing, debugging or testing embedded software on a real target system. iSYSTEM’s open and integrated Debug and Test Software enables engineers to drive a Blue Box and the corresponding development.

iSYSTEM tools mainly do support safety and security application development. Thus, control software development in markets such as Automotive/Transportation, Railway, Avionics, and Medical where customers require high sophisticated functionality, test automation support, services and certification. Markets like Industrial, Telecom, and Consumer do benefit from this software configurable tool portfolio by adopting it easily to their actual needs.

iSYSTEM specializes in embedded development and test tools, provides debugger and analyzer solutions for more than 50 CPU architectures and their derivatives (3000+ microcontrollers). The Windows and/or Eclipse based development environment is easy to learn and use. The flexible integration and application of iSYSTEM solutions within the entire development process is enabled by open and public interfaces (APIs).

iSYSTEM maintains long standing and close relationships with all major semiconductor, operating system and compiler companies worldwide. This guarantees quick tool availability and the highest level of integration.

iSYSTEM is a ISO9001:2008 certified company.

Productronica 2013

From 12 to 15 November, EIIT will have a 50m2 stand at the most important fair in the electronics production equipment sector, Productronica, in Munich. This is the twentieth edition of this event, which has been organised biannually for several years now, and which in 2011 received 13,325 attendees, who had the opportunity of visiting a total of 214 exhibitors in 7 different halls.

Our 4 business units will be there, although we will pay special attention to Special Test Equipment and Solutions, Equipment & Partnership. We will present our fourth generation of in-line test systems, with surprising new features. We will also have screening test equipment and one or two other surprises!

Our stand will be located in the A1 test pavilion, in stand 434. To access it, you need to use the west entrance of the Munich Fair.

Visiting times are:

  • Tuesdays to Thursdays: 09:00h – 18:00h
  • Fridays: 09:00h – 16:00h

Here is a link of the organisation with directions to the exhibition site:

If you would like to receive electronic invitations for the event, send an email with your contact details to indicating in the email heading, PRODUCTRONICA 2013.


On 14 and 21 March 2013 the company National Instruments organised the Graphic Design of Systems Technology Forum. This year it was held in Barcelona and San Sebastian. The aim of the event was for participants to learn about the evolution of software-based instruments, through a series of technical sessions, the practical area, practical applications, the exhibition area and one-off networking opportunities.

The event was attended by engineers from different fields (the automotive industry, telecommunications, industry, Medical technology, university, etc.) and from a range of departments: design, production, quality, etc. EIIT, as an expert in the design and manufacture of test equipment, and Alliance Member of National Instruments, were represented on a stand in the exhibition area, where attendees could see real test applications. Specifically, we showed a PXI device that generated DVT signals for an automotive industry infotainment unit.


On 4 June 2013, the company National Instruments organised the seventh edition of the aerospace and defence forum, which took place at the Marañosa Technology Institute in Madrid. The forum established the ambitious objective of sharing innovative technologies to support the engineering of next-generation systems and to discuss modern applications in the industry.

The event was attended by heads of engineering departments and executives of Spain’s leading companies in this industry. EIIT, as an expert in the design and manufacture of aerospace, aeronautics and defence test equipment, was represented with a stand, where attendees could exchange opinions and experiences on testing in this industry area.

We are also actively involved in technical seminars, having presented a recent and successful project:

Data streaming and high digital speed in digital space communications

Our colleague Dimas Gimeno, engineer of the EIIT Special Test Equipment department, was responsible for communicating to attendees the initial challenge posed at the start of the project and the hardware and software tools selected for implementing it.

Here is an interesting comment from his presentation:

“We can see high digital speed, but the data streaming system we have developed with NI technology on HSDIOs and FPGAs is not very common, particularly when such a high bandwidth and disk storage is necessary.”

GOEPEL electronic prepares Software Platform for Embedded Test and Validation to support 4th Generation Intel® Core™ Processors

GOEPEL electronic, world-class vendor of Embedded System Access (ESA) solutions, announces the support of the 4th generation Intel® Core™ processors (code-named “Haswell”) within the framework of the SYSTEM CASCON™ platform for validation and test of complex processor boards.

SYSTEM CASCON™ is an integrated software development environment with a comprehensive tool suite, uniform GUI, and graphical project development for the synchronized utilization of all ESA technologies, enabling test, programming, and debug operations without nail or probe access (noninvasive).  In addition to JTAG/Boundary Scan/ IEEE 1149.x, key elements of the ESA philosophy are, in particular, Processor Emulation Test, Chip Embedded Instrumentation, Core Assisted Programming, and FPGA Assisted Test.

Support of the new Intel processors is based on the recently introduced Intel® Silicon View Technology (Intel® SVT). Intel® SVT is a proprietary method, comprised of various features integrated into Intel processors and chipsets, enabling platform debugging, electrical validation and production test. Complex 4th generation Intel Core processor-based designs with reduced physical access and high-speed signals can now be tested structurally and functionally with high-quality diagnostics. By means of processor-specific VarioTAP® models, these capabilities can be seamlessly incorporated into SYSTEM CASCON. Additional information can be found at

“For more than a decade our system solutions have enabled the utilization of Boundary Scan/IEEE 1149.x features of Intel processors for the test of complex boards. Supporting the 4th generation Intel Core processors based on the Intel Silicon View Technology is the next logical step in the exploitation of additional validation and test opportunities with our Embedded System Access philosophy“, explains Heiko Ehrenberg, Technology Officer for Embedded System Access Technologies and Managing Director at GOEPEL electronics LLC in the US. “For designs applying the 4th generation Intel Core processors, our OEM, ODM and EMS customers can now refer to new SYSTEM CASCON tools to accelerate prototyping, shorten time frames for New Product Introduction (NPI), and ensure the quality of production test with reduced access. As quite a number of these users are also members of the Intel Intelligent System Alliance, this platform enables us to specifically address the needs of, and cooperate with, system developers, system manufacturers, and system integrators.”

In the context of the new product development, GOEPEL electronic has joined the Intel® Intelligent Systems Alliance as General Member. Intel Intelligent Systems Alliance is a global ecosystem of 200+ member companies that provide the performance, connectivity, manageability, and security developers need to create smart, connected systems. Close collaboration with Intel enables Alliance members to innovate with the latest technologies, helping developers deliver first-in-market solutions.

About the 4th Generation Intel Core CPUs and Intel® SVT

The 4th generation Intel® Core™ processor platform is based on an enhanced Tri-Gate transistor design and 22nm process technology. It provides increased performance, double graphics performance, 50% longer battery life for portable applications and an increased I/O flexibility supporting USB 3.0, PCI Express 3.0 and serial ATA interfaces. Additionally, the architecture enables Intel Silicon View Technology utilization securing design and test quality for OEM and ODM. More information on

Intel® and Intel Core™ are registered trademarks of Intel Corporation in the United States and other countries.