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VarioTAP® processor emulation for Texas Instruments AM355x family

GOEPEL electronic extends the VarioTAP® technology for universal processor emulation for the Texas Instruments AM355x family of the Sitara™ series. The processor is reconfigured to provide design-integrated test and programming instruments via the native debug port. A respective VarioTAP® model, as part of an extensive IP library, contains all relevant access information for the respective target processor. On this basis, users can select a processor corresponding to their design and be able to test and validate the connected hardware unit as well as program Flash memories.

The new VarioTAP® model offers these techniques for the AM355x family from Texas Instruments. These processors allow designs with many features including lower power consumption. Main areas of application are automotive, industrial and consumer electronics. The processors are based on a 32-bit ARM Cortex A8 RISC architecture with clock frequencies up to 1.0 GHz. They are integrated into miniaturized housings as BGA components with up to 324 Pins, not allowing direct contacting to external instruments. VarioTAP® can be utilized to provide design-integrated tools for test, hardware debug, Flash programming and design validation after chip mounting.

 

About VarioTAP®:

VarioTAP® is a technology for processor emulation developed by GOEPEL electronic. Thereby, a processor is reconfigured to provide design-integrated test and programming instruments via the native debug port. A respective VarioTAP® model, as part of an extensive IP library, contains all relevant access information for the respective target processor. On this basis users can select a processor corresponding to their design and be able to test and validate the connected hardware unit as well as program Flash memories.

“FLY-BY-WIRE” INTEGRATION TEST BENCH

EIIT has delivered in July to Airbus Defence & Space an integration bench to test the capabilities of the control units in charge of the hydraulic servo actuators for the rudder and the elevators in order to upgrade the navigation system of the aircrafts to a fly-by-wire system.

This bench is made up one 19”rack where the following elements are mounted:  three airborne control units, one VME based simulation system, one patching panel for signal monitoring, two Ethernet switches, for internal interconnection plus connection to the external laboratory network, plus the corresponding power distribution units.

The bench is powered by SEAS System, SEAS v3.3 version, software System developed by   Airbus DS.

The VME instrumentation hardware is designed to monitor /simulate the following signals: 39 ARINC 429 buses, 87 discrete signals, 6 analog signals, 9×6 wires LVDT sensors, 6 x 4 wires LVT sensors, 6 x 5 wires RVDT sensors, 6 RS232 buses and 2 CAN buses.

All the signals and buses have been functionally tested prior to the delivery of the system and the LVDT simulation outputs have been tested to accuracies in the range of 0,275% to 0,85%, giving an absolute value in accuracy of 9 mV to 16 mV.

Fly-by-wire tester

All-embracing solution for in-system programming

GOEPEL electronic announces the extension of the AFPG (Automated Flash Program Generator) for the world’s only solution to support all ISP options (In-System Programming) in one tool. The AFPG is a tool for the automatic generation of scripts for universal in-system programming of non-volatile memory such as flash devices, and also microcontrollers with integrated flash, via boundary scan. The ISP programs mounted devices directly in the native environment, not as individual components before assembly.

The new Version of the AFPG now also supports universal in-system programming of NAND™ flash devices, Phase Change Memories (PCM), OneNAND™ components, FPGA embedded instruments as well as connected processors, via Boundary Scan,. The AFPG tool provides a graphical definition of the command sequence, various possibilities for bad block handling, multi-site support and a corresponding block library with more than 1000 types which work perfectly together with the hardware integrated SPACE architecture.

system-cascon

The new AFPG tool essentially allows cost and time advantages. In-system programming saves costs for socket adaption and external equipment. Production logistics is simplified and storage costs can be reduced. High programming speed and an extremely high degree of automation also ensure time savings. Furthermore, ISP procedures can be openly combined with other testing and processing functions on one platform due to the architecture of SYSTEM CASCON™. Using the appropriate SCANFLEX TAP transceiver, multiple boards can be programmed at the same time (SFX-TAP16/G up to 16 boards).

Summer special for interactive test of electronic control units

Starting at the Testing Expo 2014 in Stuttgart, GOEPEL electronics offers a complete package for interactive electronic control unit (ECU) testing in context of a limited summer campaign.

The GOEPEL electronics summer special is a composition of hardware, software and an operator terminal which is pre-configured and ready to go.

The modular communication controller smartCar allows a variety of test and diagnostic applications, which can be parameterized via the innovative and easy to use software suit myCar.

As a special bonus, the package includes a Windows Tablet which completes the bundle and allows immediate use. The GOEPEL electronics summer special supports the interfaces CAN, LIN and K-Line, together with the corresponding transport and diagnostic protocol.

The offer is limited and valid until 30 September 2014.

SmartCAR+myCAR+Tablet

MATCHMAKING PROGRAM for the Aerospace & Defense Industry

EIIT will be present in Aerospace & Defense meetings in Seville from 3 to 6 of June, where B2B platforms, high level conferences and industrial tours will help the understanding of the aerospace business trends and needs. The event will be hold at IBES PALACIO DE CONGRESOS Y EXPOSICIONES DE SEVILLA (Avenida ALCALDE LUIS URUÑUELA, 1, Sevilla).
More information under: http://www.bciaerospace.com/sevilla/en/

Please contact us if you require a personal meeting.

ADM Sevilla

NIDays 2014 – 2nd Prize for the Best Application of Test and Measurement

During the technical sessions organized last April 8, 2014 by the company National Instruments in the IFEMA fairgrounds , our engineer Miguel Navas , from our Special TEST Equipment Business Unit, made ​​a technical presentation of a project recently delivered. The project was awarded with the second prize for the best application of test and measurement during the past year.

We are proud of this recognition that encourage us to continue working on applications that that require deep knowledge and control of the hardware and software tools from National Instruments, as well as other technologies used in them.
EIIT, as an expert in the design and manufacture of test equipment and National Instruments Alliance Member was represented at a booth in the exhibit area where attendees could see real test applications.

NI Days 2014

NI DAYS 2014 SPAIN

EIIT, a National Instruments Alliance Member, will be present once again at the NI Days Technology Forum showing innovative test solutions in our core business areas.

The event will take place on April 8 at the IFEMA Trade Fair (North Convention Center). You will find us in the exhibitor’s area.
Registration must be done entering in http://spain.ni.com/nidays

 

NI DAYS 2014 Spain
NI DAYS 2014 Spain

International distributors

EIIT in its ongoing process of internationalization is pleased to announce the newly opened global network of distributors. We hope in this way to reach more customer locations and offer the best service.

These partners will strengthen the company’s access to their countries and will provide direct, quick and effectively support to the end customers.

We welcome our partners:

  • ELAS Kft (Hungary)
  • Ol-Tech (Poland)
  • Lenax (England)
  • Lenax (Bulgaria)
  • Edgetech  (India)
  • Puva (Mexico)
  • Maxtronix (Philippines)

For detailed contact information, check at our website under WHERE WE ARE, EIIT PARTNERS

Distribution agreement with TRI

GRUPO EIIT announces the distribution agreement in Spain and Portugal of the testing products of the Taiwanese company Test Research, Inc. Additionally we have signed an international agreement, that allows us to integrate TRI’s ICT/MDA instrumentation into our Offline and In-Line Test Handlers. At GRUPO EIIT, we do believe that this strategic partnership will make us grow internationally delivering fully integrated TRI’s & EIIT outstanding products, but also comprehensive services.

About TRI

TRI provides the most effective cost/performance solutions to meet a comprehensive range of manufacturing Test and Inspection requirements. From Solder Paste Inspection (SPI), Automated Optical Inspection (AOI), and 3D Automated X-ray Inspection (AXI) systems to Manufacturing Defect Analyzers (MDAs) and In-Circuit Test equipment.
Test Research, Inc. was founded in April 1989, is dedicated to playing a leading role as a solutions provider in inspection & testing automation for the electronics, information and communication industries. With strong R&D capabilities, they have developed automated inspection & testing equipment used for PCB assembly and IC packaging. These products have served to improve their customers’ productivity, yields and product quality. Presently, TRI has 800 employees and has established offices in the USA, Malaysia, Mainland China, Germany, Japan and Korea. They also have distributors in over 30 countries. Learn more at www.tri.com.tw.

GOEPEL electronic demonstrates JTAG controllable Mixed Signal Tester-on-Chip (ToC)

At the 2013 International Test Conference, GOEPEL electronics will be demonstrating CION™ LX, the world’s first JTAG controllable Tester-on-Chip (ToC) with mixed signal architecture. The newly developed chip provides single-ended and differential test channels, which feature a Boundary Scan interface compliant with IEEE Std. 1149.1, IEEE Std.1149.6, or IEEE Std 1149.8.1. All channels can be coupled with numerous integrated analogue and digital instruments. As a result, the CION™ LX can support more than 15 different static and dynamic test and measurement operations on each test channel. In addition to classic Boundary Scan functionalities, these are arbitrary waveform generation, analogue signal recording, digital frequency measurement and toggle detection. In connection with programmable interface characteristics such as slew rate or pull up/down, the CION LX offers extremely flexible signal configuration and, therefore, necessary universality as a tester interface.

“The new CION LX helps to create universal scalable low-cost test systems that can easily be integrated into existing JTAG ecosystems, covering analogue and digital test and measurement tasks”, says  Heiko Ehrenberg, Technology Officer for Embedded System Access (ESA) with GOEPEL electronics Ltd. USA. “The application focus is placed upon test quality improvement through deeper and more flexible structural tests and at-speed tests that don’t require high performant instrumentations. The utilized per pin architecture enables nearly unlimited implementations of mixed signal test strategies.”

About the CION™ LX:

CION LX

The CION LX was developed in 0.35 µm mixed-signal CMOS technology and provides four independent I/O ports. Each port can be individually operated in a voltage range from 0.9 V to 3.6 V. The integrated Boundary Scan architecture supports the standards IEEE 1149.1, IEEE 1149.6 and IEEE 1149.8.1, at a maximum TCK frequency of 100 MHz. In addition to the single-ended pins, the CION LX provides differential signals as well as interfaces with increased driver ability. Four operation modes enable the IC‘s flexible utilization as purely serially controlled JTAG transceiver, parallel I/O buffer, latched bus transceiver, and pin driver.

Furthermore, instruments such as digitizer, arbitrary waveform generator, event counter, frequency meter and toggle detector are integrated into the CION LX. These instruments can be accessed – depending on operation mode – either serially via the JTAG Test Access Port (TAP) or a parallel control bus. The instruments can be activated simultaneously to Boundary Scan operations and per test channel. For each channel, pull-up and pull-down resistors can be additionally connected. Moreover, the drivers’ slew rates are programmable.

Availability and Licensing:

The CION LX is currently available as a sample. First series deliveries are planned for quarter three in 2013. An LGA housing with 116 pins will be used. Additionally, there will be a CION LX Evaluation Board.

About JTAG/Boundary Scan:

Boundary Scan (IEEE Std. 1149.x) is a modern access method for the test and programming of complex circuits without mechanical probe access (non-intrusive).

Boundary Scan is part of the Embedded System Access (ESA) strategies and is based on design-integrated test electronics. ESA technologies include techniques such as Chip Embedded Instruments, Processor Emulation Test, In-System Programming or Core Assisted Programming. They are currently the most modern strategies for validation, test and debug as well as programming of complex boards and systems. They can be applied throughout the entire product life cycle, enabling enhanced test coverage at reduced costs.